Solar cells are photovoltaic devices that convert sunlight directly into electrical power. The most common solar cell material is silicon, which is in the form of single or polycrystalline wafers. However, the cost of electricity generated using silicon-based solar cells is higher than the cost of electricity generated by the more traditional methods. Therefore, since early 1970's there has been an effort to reduce cost of solar cells for terrestrial use. One way of reducing the cost of solar cells is to develop low-cost thin film growth techniques that can deposit solar-cell-quality absorber materials on large area substrates and to fabricate these devices using high-throughput, low-cost methods.
Group IBIIIAVIA compound semiconductors comprising some of the Group IB (Cu, Ag, Au), Group IIIA (B, Al, Ga, In, Tl) and Group VIA (O, S, Se, Te, Po) materials or elements of the periodic table are excellent absorber materials for thin film solar cell structures. Especially, compounds of Cu, In, Ga, Se and S which are generally referred to as CIGS(S), or Cu(In,Ga)(S,Se)2 or CuIn1-xGax (SySe1-y)k, where 0≦x≦1, 0≦y≦1 and k is approximately 2, have already been employed in solar cell structures that yielded conversion efficiencies approaching 20%. Absorbers containing Group IIIA element Al and/or Group VIA element Te also showed promise. Therefore, in summary, compounds containing: i) Cu from Group IB, ii) at least one of In, Ga, and Al from Group IIIA, and iii) at least one of S, Se, and Te from Group VIA, are of great interest for solar cell applications.
The structure of a conventional Group IBIIIAVIA compound photovoltaic cell such as a Cu(In,Ga,Al)(S,Se,Te)2 thin film solar cell is shown in FIG. 1. The device 10 is fabricated on a substrate 11, such as a sheet of glass, a sheet of metal, an insulating foil or web, or a conductive foil or web. The absorber film 12, which comprises a material in the family of Cu(In,Ga,Al)(S,Se,Te)2, is grown over a conductive layer 13, which is previously deposited on the substrate 11 and which acts as the electrical contact to the device. The substrate 11 and the conductive layer 13 form a base 20. Various conductive layers comprising Mo, Ta, W, Ti, and stainless steel etc. have been used in the solar cell structure of FIG. 1. If the substrate itself is a properly selected conductive material, it is possible not to use a conductive layer 13, since the substrate 11 may then be used as the ohmic contact to the device. After the absorber film 12 is grown, a transparent layer 14 such as a CdS, ZnO or CdS/ZnO stack is formed on the absorber film. Radiation 15 enters the device through the transparent layer 14. Metallic grids (not shown) may also be deposited over the transparent layer 14 to reduce the effective series resistance of the device. The preferred electrical type of the absorber film 12 is p-type, and the preferred electrical type of the transparent layer 14 is n-type. However, an n-type absorber and a p-type window layer can also be utilized. The preferred device structure of FIG. 1 is called a “substrate-type” structure. A “superstrate-type” structure can also be constructed by depositing a transparent conductive layer on a transparent superstrate such as glass or transparent polymeric foil, and then depositing the Cu(In,Ga,Al)(S,Se,Te)2 absorber film, and finally forming an ohmic contact to the device by a conductive layer. In this superstrate structure light enters the device from the transparent superstrate side. A variety of materials, deposited by a variety of methods, can be used to provide the various layers of the device shown in FIG. 1.
In a thin film solar cell employing a Group IBIIIAVIA compound absorber, the cell efficiency is a strong function of the molar ratio of IB/IIIA. If there are more than one Group IIIA materials in the composition, the relative amounts or molar ratios of these IIIA elements also affect the properties. For a Cu(In,Ga)(S,Se)2 absorber layer, for example, the efficiency of the device is a function of the molar ratio of Cu/(In+Ga). Furthermore, some of the important parameters of the cell, such as its open circuit voltage, short circuit current and fill factor vary with the molar ratio of the IIIA elements, i.e. the Ga/(Ga+In) molar ratio. In general, for good device performance Cu/(In+Ga) molar ratio is kept at around or below 1.0. As the Ga/(Ga+In) molar ratio increases, on the other hand, the optical bandgap of the absorber layer increases and therefore the open circuit voltage of the solar cell increases while the short circuit current typically may decrease. It is important for a thin film deposition process to have the capability of controlling both the molar ratio of IB/IIIA, and the molar ratios of the Group IIIA components in the composition. It should be noted that although the chemical formula is often written as Cu(In,Ga)(S,Se)2, a more accurate formula for the compound is Cu(In,Ga)(S,Se)k, where k is typically close to 2 but may not be exactly 2. For simplicity we will continue to use the value of k as 2. It should be further noted that the notation “Cu(X,Y)” in the chemical formula means all chemical compositions of X and Y from (X=0% and Y=100%) to (X=100% and Y=0%). For example, Cu(In,Ga) means all compositions from CuIn to CuGa. Similarly, Cu(In,Ga)(S,Se)2 means the whole family of compounds with Ga/(Ga+In) molar ratio varying from 0 to 1, and Se/(Se+S) molar ratio varying from 0 to 1.
One technique for growing Cu(In,Ga)(S,Se)2 type compound thin films for solar cell applications is a two-stage process where metallic components of the Cu(In,Ga)(S,Se)2 material are first deposited onto a substrate, and then reacted with S and/or Se in a high temperature annealing process. For example, for CuInSe2 growth, thin layers of Cu and In are first deposited on a substrate and then this stacked precursor layer is reacted with Se at elevated temperature. If the reaction atmosphere also contains sulfur, then a CuIn(S,Se)2 layer can be grown. Addition of Ga in the precursor layer, i.e. use of a Cu/In/Ga stacked film precursor, allows the growth of a Cu(In,Ga)(S,Se)2 absorber.
Two-stage process approach may also employ stacked layers comprising Group VIA materials. For example, a Cu(In,Ga)Se2 film may be obtained by depositing In—Ga—Se and Cu—Se layers in an In—Ga—Se/Cu—Se stack and reacting them in presence of Se. Similarly, stacks comprising Group VIA materials and metallic components may also be used. Stacks comprising Group VIA materials include, but are not limited to In—Ga—Se/Cu stack, Cu/In/Ga/Se stack, Cu/Se/In/Ga/Se stack, etc.
Selenization and/or sulfidation or sulfurization of precursor layers comprising metallic components may be carried out in various forms of Group VIA material(s). One approach involves using gases such as H2Se, H2S or their mixtures to react, either simultaneously or consecutively, with the precursor comprising Cu, In and/or Ga. This way a Cu(In,Ga)(S,Se)2 film may be formed after annealing and reacting at elevated temperatures. It is possible to increase the reaction rate or reactivity by striking plasma in the reactive gas during the process of compound formation. Se vapors or S vapors from elemental sources may also be used for selenization and sulfidation. Alternately, as described before, Se and/or S may be deposited over the precursor layer comprising Cu, In and/or Ga and the stacked structure can be annealed at elevated temperatures to initiate reaction between the metallic elements or components and the Group VIA material(s) to form the Cu(In,Ga)(S,Se)2 compound.
Reaction step in a two-stage process is typically carried out in batch furnaces. In this approach, a number of pre-cut substrates with precursor layers deposited on them are placed into a batch furnace and reaction is carried out for periods that may range from 15 minutes to several hours. Temperature of the batch furnace is typically raised to the reaction temperature, which may be in the range of 400-600 C, after loading the substrates. The ramp rate for this temperature rise is normally lower than 5 C/sec, typically less than 1 C/sec. One prior art method described in U.S. Pat. No. 5,578,503 utilizes a rapid thermal annealing (RTP) approach to react the precursor layers in a batch manner, one substrate at a time. In this design the temperature of the substrate with the precursor layer is raised to the reaction temperature at a high rate, typically at 10 C/sec.
Design of the reaction chamber to carry out selenization/sulfidation processes is critical for the quality of the resulting compound film, the efficiency of the solar cells, throughput, material utilization and cost of the process. Present invention provides methods and apparatus to carry out reaction of precursor layers for CIGS(S) type absorber formation, in a roll-to-roll manner. Roll-to-roll or reel-to-reel processing increases throughput and minimizes substrate handling. Therefore, it is a preferred method for large scale manufacturing.